- Admin
- November 21, 2024

Case Study
FPGA Emulation for ARM Based Processor
Client
US-based Semiconductor Major
- FPGA porting of ARMv8 based dual core processor SOC
- FPGA porting and testing of security and power management system
- Partitioning and Time Division Multiplexing Design Implementation
- DDR4 Integration
- Very high utilization of above 80% on both FPGAs
- Porting Linux on the processors and running standard applications on the ported solution
- Partitioned the complex design to fit in two different FPGAs on S2C platform
- Integrated MIG IP for DDR4 interfacing
- TDM design for data transfer across FPGA due to I/O pin limitation. Designed an auto calibration logic to ensure proper sampling of data on the receiver board
- Hardware Bring up with dual VU19P logic system and external peripheral connections
- Use of JTAG and OpenOCD for verification of different modules like I2C, UART, DDR4
- Brought up Linux and enabled Office application on the FPGA-based system
- Single-house execution for FPGA and Embedded services
- Created an acceleration platform for the customer for future emulation activities
Case Study
FPGA Emulation for ARM Based Processor

Client
US-based Semiconductor Major
Challenges
-
FPGA porting of ARMv8 based dual core processor SOC
-
FPGA porting and testing of security and power management system
-
Partitioning and Time Division Multiplexing Design Implementation
-
DDR4 Integration
-
Very high utilization of above 80% on both FPGAs
-
Porting Linux on the processors and running standard applications on the ported solution
Solution
-
-
Partitioned the complex design to fit in two different FPGAs on S2C platform
-
Integrated MIG IP for DDR4 interfacing
-
TDM design for data transfer across FPGA due to I/O pin limitation. Designed an auto calibration logic to ensure proper sampling of data on the receiver board
-
Hardware Bring up with dual VU19P logic system and external peripheral connections
-
Use of JTAG and OpenOCD for verification of different modules like I2C, UART, DDR4
-
Brought up Linux and enabled Office application on the FPGA-based system
-
Business Impact

Single-house execution for FPGA and Embedded services

Created an acceleration platform for the customer for future emulation activities