- Admin
- March 15, 2025

Case Study
UVM porting of Chipset level verification

Client
A US based Semiconductor Company.
The client was looking for a strategic partner to help them port their current verification methodology to UVM
Scope
• UVM Architecture, TB and Testcase porting
• Enable adoption of UVM for future projects
Challenges
Ignitarium is responsible for the following
• Architect the UVM verification approach
• Port the complex TB and test cases from System Verilog to UVM
• Develop scripts for simulation of the UVM TB + RTL
• Ensure coverage matches legacy verification approach.
Solution
• 8 Member team
• Execution Model - Fixed price model
• Complex protocols like FPD link, Display port etc
• Complex chipset level verification with configurability to choose SER and multiple DES devices
• Integrating Cadence VIPs for I2C, SPI, I2S, DP
Tools
• Incisive Simulator
• Cadence VIPs
• Vmanager
Business Impact

Complete ownership of migration of verification methodology to UVM

Unlock new revenue streams by enhancing value to the customer – Reduction in unplanned fleet downtime