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With the skyrocketing number of devices that are being used at home, work and play, consumers are moving away from pressing buttons to using voice UI to control these devices.
  • Enesh Manian and Neeraj P M
  • September 29, 2021

Automated Test Jig for Edge-based Voice Command Engines

With the skyrocketing number of devices that are being used at home, work and play, consumers are moving away from pressing buttons to using voice UI to control these devices. As voice sensing is becoming a must-have feature in devices, voice-enabled applications are proliferating with a vast majority of Audio AI deployments being done on low-cost microcontroller-based battery-powered edge devices. 

Addressing this space is Septra™, Ignitarium’s Audio ML platform. Septra™ contains a host of key software IP components for Noise Suppression, Voice Activity Detection, Voice Command Recognition and Sound Event Classification. Validating these components for deployment readiness on different MCU platforms is a complex task. The Septra™ test jig is a hardware-software test infrastructure purpose-built to thoroughly evaluate the functionality and performance of individual components as well as the end-to-end audio pipeline.

In this blog, we describe the use of the Septra™ Test Jig for validation of our Voice Command Recognition pipeline on MCU platforms. Multiple versions of ARM Cortex-M series, Renesas RX and DSP cores have been used as hardware targets.

Objectives

The automated test jig for a voice command engine has the following main objectives:

  • To check the functionality of the software algorithms and the complete audio pipeline
  • To check the performance of the algorithms with real time audio under noisy conditions.
  • To find the accuracy of algorithms for different wake words, keywords and languages.
  • Test the algorithm on different microcontroller platforms.

Test-Jig components

The Test-jig has two main components:

  • The microcontroller which hosts the audio algorithms to be tested.
  • The PC side Python application that initiates and orchestrates the testing.

The microcontroller is flashed with an application firmware which links the audio algorithm to be tested. Once the application firmware is compiled, this needs to be flashed into the respective platform and ensure that the DUT is ready.

The PC side application is a command line based application written in Python. This application controls the entire test-jig functionality and generates the test report per audio sequence that is fed in.

Both the PC application and the microcontroller communicate over the UART / USB interface using a custom protocol.

The test-jig is capable of testing the algorithm in two modes.

  • Mode-1: File based test
  • Mode-2: Real-time audio based test

Fig 1

In Mode 1, the audio test sequences are fed to the PC application which then converts the same into byte format and sends it across the UART interface for the algorithm testing. The result of the testing (predicted keywords in this use case) is aggregated within the microcontroller memory and shared back to the PC application once requested. The test results from the DUT are then formulated and verified on the PC side thus finally generating the consolidated test result and the accuracy metrics. 

Fig 2


In Mode 2, the data to test the algorithm comes from the Mic which is live fed to the algorithm residing within the microcontroller. The result of the predictions is evaluated internally by the microcontroller and buffered until the PC application requests. The consolidated report generation and accuracy report generation method remains the same as in Mode 1.

Test-Jig outputs

Mode1 (File based Test):

mode1sf

Fig 3: Mode1 sample report format

Output will be a .csv file. 

With columns as:

Testid, Filename, Expected keyword, Predicted keyword, VAD Timestamp (milliseconds), VCE Timestamp (milliseconds), Confidence

VAD Timestamp signifies the position in time when the Voice Activity Detection algorithm triggered. VCE Timestamp signifies the position in time when the Voice Command Engine triggered prediction of the incoming keyword.

Mode2 (Mic based testing):

modelf

Fig 4: Mode2 report format

Output will be a .csv file

With columns as:

Testid, Filename, Expected keyword, Predicted keyword, VAD Timestamp (ms), VCE Timestamp (ms), Confidence,  RX File Start time (hh:mm:ss:ms), System FileStart time (hh:mm:ss:ms), System VAD Time (hh:mm:ss:ms), System VCE time (hh:mm:ss:ms), RX File stop time (ms), System File Stop time (hh:mm:ss:ms), Status

The first 7 columns are the same for Mode1 and Mode2. The remaining columns are additional timestamps. The real-time, over-the-air nature of incoming speech samples in Mode 2 mimics real life, requiring additional information to correlate ranges of time during which various algorithms are expected to trigger or generate predictions. 

A comprehensive report is then generated automatically in xls format:

combinedmode2lf

Fig 5

Fig 6

The generated report will also capture accuracy metrics that can be tuned for the specific context of the application. The above example captures a Voice Command Recognition use case targeted to a specific consumer appliance:

TP(Total)-True positive: % of correctly recognizing actual commands and correctly ignoring random (unknown) words

TP(Commands only)-True Positive:% of correctly recognizing actual commands when there were no random (unknown) words

FP(Total)-False Positive:% of triggering the wrong command where there were actual commands and random (unknowns) words

FP(Commands only):False Positive:% of triggering the wrong command when there were no random (unknown) words

FN(Total)-False Negative:% of actual commands being incorrectly ignored (no action on appliance)

FN(Commands Only)-False Negative: % of actual commands being incorrectly ignored (no action on appliance) where there were no random (unknown) words

In summary, the Septra™ Test Jig infrastructure provides a robust means to test any kind of audio or speech related algorithm on multiple hardware platforms with high levels of automation.

Curious to know more about Ignitarium’s Septra™? Visit our Audio AI Solutions page here. 

Related blogs:

‘A new lightweight CNN model for Automatic Speech Command Recognition on Microcontrollers’
‘Simulating Real World Audio for a Voice Command Engine’

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      Sujeet is responsible for driving innovation in Automotive software, identifying Automotive technology trends and advancements, evaluating their potential impact, and development of solutions to meet the needs of our Automotive customers.

      At Ignitarium, he was previously responsible for the growth and P&L of the Embedded Business unit focusing on Multimedia, Automotive, and Platform software.

      Prior to joining Ignitarium in 2016, Sujeet has had a career spanning more than 16 years at Wipro. During this stint, he has played diverse roles from Solution Architect to Presales Lead covering various domains. His technical expertise lies in the areas of Telecom, Embedded Systems, Wireless, Networking, SoC modeling, and Automotive. He has been honored as a Distinguished Member of the Technical Staff at Wipro and has multiple patents granted in the areas of Networking and IoT Security.

      Sujeet holds a degree in Computer Science from Government Engineering College, Thrissur.

       

      RAJIN RAVIMONY Distinguished Engineer

      RAJIN RAVIMONY

      Distinguished Engineer

       

      At Ignitarium, Rajin plays the role of Distinguished Engineer for complex SoCs and systems. He's an expert in ARM-based designs having architected more than a dozen SoCs and played hands-on design roles in several tens more. His core areas of specialization include security and functional safety architecture (IEC61508 and ISO26262) of automotive systems, RTL implementation of math intensive signal processing blocks as well as design of video processing and related multimedia blocks.

       

      Prior to Ignitarium, Rajin worked at Wipro Technologies for 14 years where he held roles of architect and consultant for several VLSI designs in the automotive and consumer domains.

       

      Rajin holds an MS in Micro-electronics from BITS Pilani.

       

      SIBY ABRAHAM Executive Vice President, Strategy

      SIBY ABRAHAM

      Executive Vice President, Strategy

       

      As EVP, of Strategy at Ignitarium, Siby anchors multiple functions spanning investor community relations, business growth, technology initiatives as well and operational excellence.

       

      Siby has over 31 years of experience in the semiconductor industry. In his last role at Wipro Technologies, he headed the Semiconductor Industry Practice Group where he was responsible for business growth and engineering delivery for all of Wipro’s semiconductor customers. Prior to that, he held a vast array of crucial roles at Wipro including Chief Technologist & Vice President, CTO Office, Global Delivery Head for Product Engineering Services, Business Head of Semiconductor & Consumer Electronics, and Head of Unified Competency Framework. He was instrumental in growing Wipro’s semiconductor business to over $100 million within 5 years and turning around its Consumer Electronics business in less than 2 years. In addition, he was the Engineering Manager for Enthink Inc., a semiconductor IP-focused subsidiary of Wipro. Prior to that, Siby was the Technical Lead for several of the most prestigious system engineering projects executed by Wipro R&D.

       

      Siby has held a host of deeply impactful positions, which included representing Wipro in various World Economic Forum working groups on Industrial IOT and as a member of IEEE’s IOT Steering Committee.

       

      He completed his MTech. in Electrical Engineering (Information and Control) from IIT, Kanpur and his BTech. from NIT, Calicut

       

      SUDIP NANDY

      Board Member

       

      An accomplished leader with over 40 years of experience, Sudip has helped build and grow companies in India, the US and the UK.

      He has held the post of Independent Director and Board Member for several organizations like Redington Limited, Excelra, Artison Agrotech, GeBBS Healthcare Solutions, Liquid Hub Inc. and ResultsCX.

      Most recently, Sudip was a Senior Advisor at ChrysCapital, a private equity firm where he has also been the Managing Director and Operating Partner for IT for the past 5 years. During his tenure, he has been Executive Chairman of California-headquartered Infogain Corporation and the non-Exec Chair on the board of a pioneering electric-2-wheeler company Ampere Vehicles, which is now a brand of Greaves Cotton Ltd.

      Earlier on in his career, Sudip has been the CEO and then Chairman India for Aricent. Prior to that, he had spent 25+ years in Wipro where he has been the Head of US business, Engineering R&D Services, and later the Head of EU Operations.

      Sudip is an active investor in several interesting startups in India and overseas, which mostly use technology for the social good, encompassing hyperlocal, healthcare, rural development, farmer support and e2W ecosystem. He also spends time as a coach and mentor for several CEOs in this role.

       

      SUJEETH JOSEPH Chief Product Officer

      SUJEETH JOSEPH

      Chief Technology Officer

       

      As CTO, Sujeeth is responsible for defining the technology roadmap, driving IP & solution development, and transitioning these technology components into practically deployable product engineering use cases.

       

      With a career spanning over 30+ years, Sujeeth Joseph is a semiconductor industry veteran in the SoC, System and Product architecture space. At SanDisk India, he was Director of Architecture for the USD $2B Removable Products Group. Simultaneously, he also headed the SanDisk India Patenting function, the Retail Competitive Analysis Group and drove academic research programs with premier Indian academic Institutes. Prior to SanDisk, he was Chief Architect of the Semiconductor & Systems BU (SnS) of Wipro Technologies. Over a 19-year career at Wipro, he has played hands-on and leadership roles across all phases of the ASIC and System design flow.

       

      He graduated in Electronics Engineering from Bombay University in 1991.

       

      SUJITH MATHEW IYPE Co-founder & CTO

      SUJITH MATHEW IYPE

      Co-founder & COO

       

      As Ignitarium's Co-founder and COO, Sujith is responsible for driving the operational efficiency and streamlining process across the organization. He is also responsible for the growth and P&L of the Semiconductor Business Unit.

       

      Apart from establishing a compelling story in VLSI, Sujith was responsible for Ignitarium's foray into nascent technology areas like AI, ML, Computer Vision, and IoT, nurturing them in our R&D Lab - "The Crucible".

       

      Prior to founding Ignitarium, Sujith played the role of a VLSI architect at Wipro Technologies for 13 years. In true hands-on mode, he has built ASICs and FPGAs for the Multimedia, Telecommunication, and Healthcare domains and has provided technical leadership for many flagship projects executed by Wipro.

       

      Sujith graduated from NIT - Calicut in the year 2000 in Electronics and Communications Engineering and thereafter he has successfully completed a one-year executive program in Business Management from IIM Calcutta.

       

      RAMESH SHANMUGHAM Co-founder & COO

      RAMESH SHANMUGHAM

      Co-founder & CRO

      As Co-founder and Chief Revenue Officer of Ignitarium, Ramesh has been responsible for global business and marketing as well as building trusted customer relationships upholding the company's core values.

      Ramesh has over 25 years of experience in the Semiconductor Industry covering all aspects of IC design. Prior to Ignitarium, Ramesh was a key member of the senior management team of the semiconductor division at Wipro Technologies. Ramesh has played key roles in Semiconductor Delivery and Pre-sales at a global level.

      Ramesh graduated in Electronics Engineering from Model Engineering College, Cochin, and has a Postgraduate degree in Microelectronics from BITS Pilani.